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74LCX112MTCX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild Semiconductor | TSSOP | 16 | N/A | N/A | 74LCX112MTCX datasheet (77K) |
74LCX112MX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 16 | N/A | N/A | 74LCX112MX datasheet (77K) |
74LCX112SJ | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 16 | N/A | N/A | 74LCX112SJ datasheet (77K) |
74LCX112SJX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 16 | N/A | N/A | 74LCX112SJX datasheet (77K) |
74LCX11CW | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild Semiconductor | N/A | - | N/A | N/A | 74LCX11CW datasheet (83K) |
74LCX11M | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 14 | N/A | N/A | 74LCX11M datasheet (83K) |
74LCX11MTC | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild Semiconductor | TSSOP | 14 | N/A | N/A | 74LCX11MTC datasheet (83K) |
74LCX11MX | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 14 | N/A | N/A | 74LCX11MX datasheet (83K) |
74LCX11SJ | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 14 | N/A | N/A | 74LCX11SJ datasheet (83K) |
74LCX11SJX | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild Semiconductor | SOIC | 14 | N/A | N/A | 74LCX11SJX datasheet (83K) |